Design of Static Flip-Flops for Low-Power Digital Sequential Circuits
نویسندگان
چکیده
In this paper, we correlated various Master and slave flip-flops i.e., single edge triggered flipflops. The low-power flip-flops have place utmost necessary elements all the range of the constructing static or successive circuits. We accomplish the comparison for their performance, Delay, Rise time, Fall Time and Power dissipation. Because Power confide in the number of transistors in the circuits, so we are comparing and calculating the number of transistors of the each flip-flops. Analysis of a static/sequential circuits is done by Linear Feed Back Shift Register (LFSR) using 45nm Technology with 5MHZ frequencies and their performance analysis. Keywords— Flip-Flop, Edge Triggering, low power, Average power, Rise time, Fall Time and Frequency.
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